A nonvolatile semiconductor memory such as a spin-torque-transfer magnetic random access memory (STT-MRAM) comprises, for example, a memory cell including a resistance-change element and a select transistor (field-effect transistor [FET]) which are connected in series. The resistance of the resistance-change element is changed to a first value by a first current flowing from the resistance-change element to the select transistor, and changed to a second value by a second current flowing from the select transistor to the resistance-change element.
At this time, however, a saturation phenomenon occurs. That is, the first current is increased in proportion to an increase in voltage between the source and the drain of the select transistor in a first write operation for changing the resistance-change element to the first value, whereas the second current is not sufficiently increased even by increasing the voltage between the source and the drain of the select transistor in a second write operation for changing the resistance-change element to the second value. This is because the source potential (potential on the low potential side) of the select transistor is increased by the resistance of the resistance-change element in the second write operation.
If the gate potential (potential of word line) is raised to increase the second current in the second write operation, the first current is unnecessarily increased in the first write operation, which accelerates the deterioration of the resistance-change element. If the gate potential is optimized to obtain a suitable first current for the first write operation, however, the second current becomes so small in the second write operation that a write error rate is raised.